Engineering Services
Signal Integrity Simulation
Utilizing Mentor's HyperLynx or Cadence's Sigrity tools for analysis, SFLab can simulate high-speed signals in challenging sections of designs prior to fabrication, significantly enhancing board performance on the initial iteration. These tools facilitate improvements in board performance that are challenging to achieve without simulation. Examples include:
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Length matching of a bus of nets, even when meeting minimal conditions, can be further optimized through analysis to determine if additional matching is beneficial.
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Prediction and elimination of signal integrity issues arising from control IC settings, often overlooked until after board fabrication. Simulation fosters collaboration between firmware and hardware groups, defining required speeds and optimizing settings for drive strength and on-die termination.
For DDR designs, simulation is particularly beneficial, including timing analysis. It predicts design margin across various operating conditions.
Design Audits
SFLab provide an independent review of schematic and/or PCB layout based on your design requirements. Our experienced engineers and PCB designers offer valuable feedback through a "proofreading" exercise, suggesting improvements and providing reassurance before committing to fabrication and assembly.
Part Obsolescence
Facing component obsolescence or supply chain issues? SFLab engineers can review alternative parts, propose replacements, and handle necessary redesigns. They'll revise layouts, expediting your return to production.
Eval/COTS Board Customization
Transitioning from an Evaluation Board or Commercial Off-The-Shelf Board to your own design? SFLab can assist in designing a custom board with essential features, eliminating unnecessary components, and fitting into your desired form factor. We provide manufacturing files or collaborate with fabrication and assembly houses for prototype production. Additionally, SFLab offers support for initial functional tests and board "bring up" if needed.
